phase-locked loop的意思|示意
[电子] 锁相回路
phase-locked loop的网络常见释义
锁相回路 ... feedback loop[计]反馈环路，反馈回路 phase-locked loop锁相回路 current loop[电]电流环路 ...
锁相环 ... 锁相捕获 phase-lock acquisition 锁相环 phase-locked loop 锁相环大信号特性 PLL strong signal characteristic ...
phase-locked loop相关短语
1、 PPL Phase Locked Loop 脉冲锁定环路
2、 first-order phase-locked loop 一阶锁相环
3、 sampled phase-locked loop 抽样锁相环 ; 取样锁相环
phase-locked loop相关例句
The digital very narrow-bandwidth Phase-Locked Loop(PLL) is designed and realized for the digital range and velocity measurement receiver.
本文正是为数字化测速测距接收机设计并实现全数字化超窄带锁相环。
In this paper, Experimental circuit and results of sampled phase-locked loop system that exhibit chaotic behavior are given. Experimental results are discussed, we obtained some active conclusions.
本文给出了文献产生混沌的采样锁相环系统的实验线路及实验结果，通过对实验结果进行讨论，得出一些设计采样锁相环系统的准则。
The possibility of using this kind of phase-locked loop under noise interference and the problems of filter design are discussed.
文中还讨论了在噪声作用下采用这种环路的可能性和滤波器的设计问题。
In this paper we introduce the developmental phase and experimental equipments of long time delay phase-locked loop and also give the field test results via the satellite "Symphonic".
本文叙述了长延时锁相环的研制情况和实验设备，同时也给出了通过“交响乐”卫星的现场试验结果。
Then presented the basic structure, phase model, frequency response and performance analysis for noise and spur, of phase locked loop (PLL).
然后介绍了锁相环(PLL)的基本结构、相位模型、频率响应、噪声及杂散性能。
We present a design for an adaptive gain phase-locked loop (PLL) that features fast acquisition, low jitter, and wide tuning range.
提出了一种快捕获，低抖动，宽调节范围的增益自适应锁相环的设计。