Delay Locked Loop的意思|示意
延迟锁相环延迟锁定环路
Delay Locked Loop的网络常见释义
延迟锁相环 ...模数转换器 ; 延迟锁相环 ; 占空比调整电路 ; 连续积分器 ; 时钟抖动 [gap=1189]Keywords: high-speed ADC; delay locked loop; duty cycle stabilizer; continuous time integrator; clock jitter ..
延迟锁定环 DLL：延迟锁定环 （Delay Locked Loop）:工程技术术语库为您提供行业技术术语,是标准中的重要组成部分,术语及其应用的规范化,标准化,是教学,科研,商务等各方面社会生活正...
延迟锁定环路 ...滤波器进行脉冲成型后，根据帧同步（FrameSync，FS）提 供的PN序列位置信息利用PN的相关得到的延迟锁定环路（Delay Locked Loop， DLL）算法实现误差信号提取（Timing Error Detector，TED），得到跟踪的误差信号， 1...
环路有延迟锁相环 跟踪的基本方法是利用锁相环路来调整本地时钟的相位，常用的跟踪环路有延迟锁相环(Delay locked Loop,DLL)及 抖动锁相环(Tau dither Loop,TDL)。本系统采用延迟锁相环法。
Delay Locked Loop相关短语
1、 Delay-Locked Loop 延迟锁相环 ; 锁相环
2、 DLL Delay-Locked Loop 延时锁定循环电路
3、 delay locked loop dll 延迟锁定环路
Delay Locked Loop相关例句
In this paper we introduce the developmental phase and experimental equipments of long time delay phase-locked loop and also give the field test results via the satellite "Symphonic".
本文叙述了长延时锁相环的研制情况和实验设备，同时也给出了通过“交响乐”卫星的现场试验结果。
In this paper, a low-jitter process-independent DLL(delay locked loop) based on self-biased techniques is presented.
本文给出了一种采用自偏置技术的低抖动延迟锁相环，可应用于高频时钟产生电路。
To this end the current multipath estimation delay locked loop(MEDLL) was investigated and improvements were proposed based on the zero-point fixed principle.
为了消除扩频系统中的多径干扰，文章基于稳态零点不变的原则对多径估计延迟锁相环（MEDLL）进行研究及改进。
Based on digital delay-locked loop, the mix signal technique is used to implement the digital delay locked loop with the resource control technique.
以数字延迟锁相环为基础，并采用数模混合技术，实现了带电源控制的数字延迟锁相环。
Slip correlative taking and delay locked loop are used for the synchronization, taking, locking of PN code.
采用滑动相关捕获和延迟锁定环实现伪码的同步、捕获和跟踪；
Theoretical and numerical results show that the new scheme has an improved performance and remarkable complexity simplicity as compared with the classical digital delay-locked loop.
理论分析和数值结果表明，该方案较传统的延迟锁定跟踪方案明显降低了实现复杂度，而且性能有所提高。